Types of Interrupt Controllers: A Complete Guide

Types of Interrupt Controllers A Complete Guide for Embedded Systems

Modern embedded systems rely on interrupts to respond quickly to external and internal events without continuously polling hardware. As processors become faster and peripherals become more numerous, efficiently managing multiple interrupt requests becomes increasingly important.

This is where types of interrupt controllers become essential. An interrupt controller receives interrupt requests from different hardware devices, determines their priority, and forwards the appropriate interrupt to the processor. It helps reduce CPU overhead while ensuring that time-critical events are handled with minimal latency.

From simple 8-bit microcontrollers to advanced multicore ARM processors, different interrupt controllers are designed to meet varying performance, scalability, and real-time requirements.

An interrupt controller is a hardware unit that receives interrupt requests from multiple peripherals, prioritizes them, and forwards the appropriate interrupt to the processor. There are several types of interrupt controllers, including Generic Interrupt Controllers (GIC), Nested Vectored Interrupt Controllers (NVIC), Programmable Interrupt Controllers (PIC), Advanced Programmable Interrupt Controllers (APIC), and External Interrupt Controllers (EIC), each designed for different processor architectures and application requirements.

What Is an Interrupt Controller?

An interrupt controller is a hardware component that manages interrupt requests generated by peripherals such as timers, UARTs, GPIOs, ADCs, communication interfaces, and external devices.

Its primary responsibility is to determine:

  • Which interrupt should be serviced first
  • Which interrupts are enabled or disabled
  • Which interrupt has the highest priority
  • Whether multiple interrupts can occur simultaneously
  • When an interrupt should be forwarded to the CPU

Instead of connecting every peripheral directly to the processor, the interrupt controller acts as an intelligent intermediary that organizes and prioritizes interrupt requests for efficient processing.

How an Interrupt Controller Works

The interrupt handling process typically follows these steps:

  1. A peripheral generates an interrupt request.
  2. The interrupt controller receives the request.
  3. It checks whether the interrupt is enabled.
  4. The priority level is evaluated.
  5. The highest-priority pending interrupt is selected.
  6. The interrupt is forwarded to the processor.
  7. The CPU saves its current execution context.
  8. The processor jumps to the corresponding ISR.
  9. The ISR completes its task and clears the interrupt.
  10. The CPU restores the previous context and resumes normal execution.

This workflow ensures that important events are handled promptly without continuously polling hardware devices.

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Interrupt Controller Architecture

A typical interrupt controller consists of several functional blocks.

    Peripheral 1

           │

      Peripheral 2

           │

      Peripheral 3

           │

      Peripheral N

           │

  -------------------------

  | Interrupt Controller |

  -------------------------

    │    │      │

Priority  Mask  Pending Logic

    │

Vector Selection

    │

    CPU

    │

Interrupt Service Routine

Key Components

Interrupt Inputs

Receive interrupt requests from peripherals.

Priority Logic

Determines which interrupt should be serviced first.

Mask Register

Enables or disables individual interrupt sources.

Pending Register

Stores interrupt requests waiting for service.

Vector Logic

Selects the correct ISR address from the interrupt vector table.

CPU Interface

Transfers interrupt information to the processor.

Key Features of Interrupt Controllers

Different interrupt controllers offer different capabilities, but most include the following features:

  • Multiple interrupt channels
  • Configurable interrupt priorities
  • Interrupt masking and enabling
  • Pending interrupt detection
  • Interrupt nesting support
  • Fast interrupt response
  • Vector-based interrupt handling
  • Software-generated interrupts (supported in advanced controllers)
  • Low interrupt latency
  • Support for external and internal interrupt sources

Types of Interrupt Controllers

Different processors and embedded systems use different interrupt controller architectures based on complexity, performance, and application requirements.

  • Generic Interrupt Controller (GIC)
  • Nested Vector Interrupt Controller (NVIC)
  • Programmable Interrupt Controller (PIC)
  • Advanced Programmable Interrupt Controller (APIC)
  • External Interrupt Controller (EIC)

Diagram illustrating interrupt priority levels and context switching over time in an embedded system. Task 0 starts at the lowest priority and is interrupted by IRQ 0, which temporarily saves Task 0's context before returning execution. Task 2 is later interrupted by a higher-priority FIQ 0, demonstrating context save and restore operations. The vertical axis represents priority levels from 0 (lowest) to 3 (highest), while the horizontal axis represents time, showing how tasks and interrupts preempt each other based on priority.

1. Generic Interrupt Controller (GIC)

The Generic Interrupt Controller (GIC) is developed by ARM for Cortex-A multicore processors.

Commonly Used In

Features

  • Supports multicore processors
  • Interrupt routing to specific CPU cores
  • Software Generated Interrupts (SGIs)
  • Private Peripheral Interrupts (PPIs)
  • Shared Peripheral Interrupts (SPIs)
  • Configurable priorities
  • Interrupt grouping for secure and non-secure worlds

Advantages

  • Excellent scalability
  • Low interrupt latency
  • Supports virtualization
  • Efficient multicore interrupt distribution

Typical Applications

  • Smartphones
  • Automotive ECUs
  • Networking equipment
  • Industrial automation
  • AI edge devices

2. Nested Vectored Interrupt Controller (NVIC)

The Nested Vectored Interrupt Controller (NVIC) is integrated into ARM Cortex-M microcontrollers.

Commonly Used In

  • STM32
  • NXP LPC
  • Nordic nRF
  • TI Tiva
  • Microchip SAM
  • GD32

Features

  • Integrated into Cortex-M core
  • Hardware interrupt nesting
  • Vector-based interrupt handling
  • Programmable priorities
  • Fast interrupt entry and exit
  • Low interrupt latency

Advantages

  • Minimal software overhead
  • Efficient real-time performance
  • Easy interrupt management
  • Ideal for embedded firmware

Typical Applications

  • IoT devices
  • Consumer electronics
  • Robotics
  • Medical devices
  • Wearables
  • Industrial control

3. Programmable Interrupt Controller (PIC)

The Programmable Interrupt Controller (PIC) manages interrupt requests in many legacy computer systems and older embedded platforms.

Commonly Used In

  • Intel x86 legacy systems
  • Older industrial computers
  • Educational hardware platforms

Features

  • Interrupt prioritization
  • Interrupt masking
  • Cascaded interrupt support
  • Configurable interrupt vectors

Advantages

  • Simple architecture
  • Reliable operation
  • Easy implementation

Limitations

  • Limited scalability
  • Higher latency compared to modern controllers
  • Less suitable for multicore systems

4. Advanced Programmable Interrupt Controller (APIC)

The Advanced Programmable Interrupt Controller (APIC) is designed for modern multicore x86 processors.

Commonly Used In

  • Intel processors
  • AMD processors
  • Desktop computers
  • Servers
  • High-performance workstations

Features

  • Local APIC for each processor core
  • I/O APIC for external interrupts
  • Inter-processor interrupts (IPIs)
  • High interrupt scalability

Advantages

  • Efficient multicore interrupt handling
  • Supports symmetric multiprocessing (SMP)
  • Better performance than traditional PIC

5. External Interrupt Controller (EIC)

An External Interrupt Controller (EIC) handles interrupt signals originating outside the processor.

Common Sources

  • Push buttons
  • Sensors
  • Rotary encoders
  • Touch panels
  • External communication modules

Features

  • Edge-triggered interrupts
  • Level-triggered interrupts
  • Configurable triggering modes
  • Noise filtering (available on some MCUs)

Applications

  • Home automation
  • Robotics
  • Industrial sensors
  • Smart appliances
  • Battery-powered embedded systems

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Comparison of Different Types of Interrupt Controllers

Interrupt Controller

Common Processor

Multicore Support

Interrupt Nesting

Typical Applications

Generic Interrupt Controller (GIC)

ARM Cortex-A

Yes

Yes

Linux, Automotive, High-performance Embedded Systems

Nested Vectored Interrupt Controller (NVIC)

ARM Cortex-M

No (single-core Cortex-M)

Yes

STM32, IoT, Consumer Electronics

Programmable Interrupt Controller (PIC)

Legacy x86

Limited

Limited

Older PCs, Industrial Systems

Advanced Programmable Interrupt Controller (APIC)

Modern x86

Yes

Yes

Servers, Workstations, Desktop PCs

External Interrupt Controller (EIC)

Various MCUs

Depends on MCU

Depends on MCU

Sensors, GPIO, Robotics, Embedded Devices

Advantages of Interrupt Controllers

Interrupt controllers improve the efficiency and responsiveness of embedded systems by managing multiple interrupt sources intelligently.

1. Faster Event Handling

  • Responds immediately to hardware events
  • Reduces response time compared to polling
  • Improves real-time system performance

2. Efficient CPU Utilization

Instead of continuously checking peripherals, the CPU executes the main application until an interrupt occurs.

Benefits:

  • Lower processor workload
  • Reduced unnecessary instructions
  • Improved overall efficiency

3. Interrupt Prioritization

Multiple interrupt requests may occur at the same time. An interrupt controller:

  • Assigns priorities
  • Services critical interrupts first
  • Delays less important interrupts until later

Example:

  • Emergency shutdown → Highest priority
  • UART communication → Medium priority
  • Button press → Lower priority

4. Supports Interrupt Nesting

Higher-priority interrupts can interrupt lower-priority ISRs.

Benefits:

  • Faster response to critical events
  • Better real-time performance
  • Improved system reliability

5. Simplifies Firmware Development

Developers can focus on writing individual ISRs instead of manually checking every peripheral. This results in:

  • Cleaner code
  • Better modularity
  • Easier maintenance

6. Scales to Multiple Peripherals

Modern MCUs may include dozens or even hundreds of interrupt sources, including UART, SPI, I2C, CAN, USB, Ethernet, Timers, DMA, GPIO, and ADC. The interrupt controller manages all of them efficiently.

7. Improves Power Efficiency

The processor can remain in sleep mode until an interrupt occurs.

Common use cases:

  • Battery-powered IoT devices
  • Wearables
  • Portable medical equipment
  • Wireless sensor nodes

Limitations of Interrupt Controllers

Although interrupt controllers improve system performance, they also introduce certain design challenges.

1. Interrupt Overhead

Each interrupt requires:

  • Saving CPU context
  • Executing the ISR
  • Restoring the previous context

Frequent interrupts can reduce application performance.

2. Interrupt Latency

Latency is the delay between an interrupt request and ISR execution. Latency may increase due to:

  • Higher-priority interrupts
  • Long-running ISRs
  • Interrupt masking
  • Operating system scheduling

3. Priority Inversion

Improper priority assignment can delay critical interrupts. For example:

  • A low-priority ISR occupies the CPU.
  • A medium-priority interrupt keeps executing.
  • A high-priority task waits longer than expected.

Proper interrupt priority planning helps avoid this issue.

4. Complex Debugging

Interrupt-related bugs are often difficult to reproduce because they depend on timing. Common issues include:

  • Missed interrupts
  • Race conditions
  • Nested interrupt conflicts
  • Incorrect interrupt clearing

5. Shared Resources

Multiple ISRs may access the same variables or hardware resources. Without proper synchronization, this can lead to:

  • Data corruption
  • Unexpected behavior
  • System instability

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Conclusion

Understanding the types of interrupt controllers is essential for designing efficient and reliable embedded systems. Whether you are working with a simple ARM Cortex-M microcontroller or a multicore Cortex-A processor, the interrupt controller ensures that hardware events are handled quickly and in the correct order.

Different interrupt controllers are designed for different applications. For example, the NVIC is optimized for low-latency interrupt handling in microcontrollers, while the GIC provides advanced interrupt routing and prioritization for multicore processors running operating systems such as Embedded Linux.

As embedded systems continue to integrate more peripherals and support increasingly complex applications, selecting the appropriate interrupt controller and configuring it correctly becomes a key part of firmware development. A solid understanding of interrupt priorities, latency, masking, and nesting helps developers build responsive, stable, and real-time embedded applications.

FAQs

An interrupt controller is a hardware module that receives interrupt requests from multiple peripherals, prioritizes them, and forwards the appropriate interrupt to the processor. It also manages interrupt masking, pending interrupts, and vector selection, enabling efficient event handling in embedded systems.

The most common types include:

  • Generic Interrupt Controller (GIC)
  • Nested Vectored Interrupt Controller (NVIC)
  • Programmable Interrupt Controller (PIC)
  • Advanced Programmable Interrupt Controller (APIC)
  • External Interrupt Controller (EIC)

Each type is designed for specific processor architectures and application requirements.

The NVIC is integrated into ARM Cortex-M microcontrollers and is designed for low-latency interrupt handling in embedded applications. The GIC is used with ARM Cortex-A processors and supports multicore systems, interrupt routing, virtualization, and advanced priority management.

Interrupt priorities determine which interrupt should be serviced first when multiple interrupt requests occur simultaneously. Proper priority configuration ensures that critical events, such as safety or communication tasks, are handled before less important events, improving overall system responsiveness.

Interrupt latency is the time between an interrupt request being generated and the processor starting execution of the corresponding Interrupt Service Routine (ISR). Factors such as ISR execution time, priority levels, interrupt masking, and processor architecture influence interrupt latency.

Author

Embedded Systems trainer – IIES

Updated On: 15-07-26


10+ years of hands-on experience delivering practical training in Embedded Systems and it's design